Field of the Invention
The invention relates to a read-out circuit for a dynamic memory circuit, a memory cell array, and a method for amplifying and reading data stored in a memory cell array.
Dynamic memory circuits, such as DRAMs, have memory cells with storage capacitors whose charge can be applied to a bit line in a switchable manner by using a word line. In order to be able to detect the small charge of a storage capacitor, use is made of sense amplifier circuits that can detect a small charge difference between a bit line and its adjacent bit line. In this case, they amplify the small potential difference of the two adjacent bit lines, and the bit line with the lower potential is pulled to a low potential and the bit line with the higher potential (high potential) is pulled to a high potential.
When data are read out from the memory cells, errors can occur if a memory cell with a strong signal (i.e. large charge stored in the storage capacitor) lies beside a memory cell with a weak signal (small stored charge). Since the sense amplifiers amplify the strong signal more rapidly, it can happen that the potential swing occurring on the bit line at the cell with the strong signal causes an adjacent bit line likewise to experience a potential swing as a result of coupling. If the bit line belongs to a bit line pair at a memory cell with a weak signal, then the coupling of the strong signal onto the adjacent bit line can have the effect that the potential difference to be amplified is reversed and the memory cell with the weak signal is developed in the wrong direction. During read-out, this can have the effect that an erroneous datum is read out from the memory cell with the weak signal.